MIME-Version: 1.0 Content-Type: multipart/related; boundary="----=_NextPart_01C7341B.8E0FF400" This document is a Single File Web Page, also known as a Web Archive file. If you are seeing this message, your browser or editor doesn't support Web Archive files. Please download a browser that supports Web Archive, such as Microsoft Internet Explorer. ------=_NextPart_01C7341B.8E0FF400 Content-Location: file:///C:/1EF21713/CHFEN5655Syllabus.htm Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset="us-ascii" CHFEN 5655-001 meets with 6655-001

CHFEN 5655-001 meets with 6655-001

Title:  Silicon Chip Processing

Units: 3   Days taught:  T, H   Time:  12:25 am - 1:45 pm, Room NS 205.

Instructor: T. A. Ring, MEB 2290, ring@eng.utah.edu, 585-5705

 

The focus of this course is to give chemical engineers: 1) the basics of semiconductor materials and their properties, 2) basics of device physics, structure and electrical properties, 3) the vocabulary of the industry and 4) to translate the chemical engineering fundamentals, already learned in mass transfer, heat transfer and reaction kinetics, to problems in semiconductor processing.  The steps to be emphasized include: crystal growth, diffusion, implantation, photolithography with emphasis on light induced reactions in photo-resists, deposition methodologies with emphasis on chemical vapor deposition of various materials and chemical mechanical polishing.  In addi= tion to teaching quantitative ways of process analysis, this course will focus on how defects are minimized in these processing steps.

 

Books

Required

“The Physics of Solids” by Richa= rd Turton, Oxford University Press, 2000.=

Suggested

Silicon VLSI technology : fundamentals, pratice and modeling / James D. Plummer, Michael Deal, Peter B. Griffin<= /o:p>

VLSI planarization : methods, models, implementation / by V. Feinberg, A. Levin,= and E. Rabinovich

Basic VLSI design / Doug A. Pucknell and Kamran Eshraghian

Resists in microlithography and printing / Bohumil Bednár, Jaroslav Králícek, and Jaromír Zachoval ; with contributions by Andrei V. Yel'tsov and Tat'yana A. Yurre<= /o:p>

Multilevel interconnect technology / Gopal K. Rao<= /o:p>

Introduction to VLSI process engineering / edited by the Society of Chemical Engineers of Japan ; [editor in chief, Yuji Naka].<= /o:p>

Dry etching for VLSI / A.J. van Roosmalen, J.A.G. Baggerman, and S.J.H. Brader<= /a>

Planar processing primer / George E. Anner<= /o:p>

Microcircuit production technology / Douglas F. Horne.

Microlithography : process technology for IC fabrication / David J. Elliott.

 

Grades for 5655

  =             &nb= sp; 2 - Mid-term Exams (1-Material Properties, 2-Chip Chemical Processing)

  =             &nb= sp;            =      30% of grade for each mid-term exam

  =             &nb= sp; Homework

  =             &nb= sp;            =      20% of Grade

  =             &nb= sp; Final Exam

  =             &nb= sp;            =      20% of grade

Grades for 6655

  =             &nb= sp; 2 - Mid-term Exams (1-Material Properties, 2-Chip Processing)

  =             &nb= sp;            =      30% of grade for each mid-term exam

1-&n= bsp;      Oral Presentation (on Materials Properties – not covered in lecture)

10% of Grade<= /o:p>

  =             &nb= sp; Homework

  =             &nb= sp;            =      10% of Grade

  =             &nb= sp; Final Exam

  =             &nb= sp;            =      20% of grade

Schedule

Course Overview

Lectures

Homework&nb= sp; - see hyper links on schedule

Video Files

Add/Drop Pol= icy

Grad Projects for 6655

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